1. Field of the Invention
The present invention relates to a projection aligner which utilizes, in the process of manufacturing a semiconductor device, a projection optical system to project and align an electronic circuitry pattern onto a semiconductor substrate, and to an exposure method using such an aligner.
2. Description of the Related Art
In projection aligners, when alignment marks formed on semiconductor substrates or wafers are detected, the result of the detection is used to align wafers with masks or reticles on which electronic circuitry patterns are to be formed, and then an exposure operation is performed. There are two alignment methods. In a die-by-die method, alignment is carried out chip by chip formed on the wafer. In a global method, the positions of several chips on the wafer are determined, and the distance the entire wafer deviates from a desired position is computed on the basis of the distance each chip deviates. A wafer-mounting stage is moved to a position so that the distance each chip deviates decreases to a minimum, and then alignment is performed. The wafer-mounting stage can be moved to align the center of each chip. However, the magnification of a projection lens must be changed in order to align points within each chip. During this operation, conventionally, the chip magnification with which each chip is formed is calculated on the basis of the gaps between a plurality of alignment marks within each chip, which marks have already been exposed collectively.
The accuracy with which the chip magnification is calculated depends upon the size of the chip formed. For example, when a 15 mm.times.15 mm chip is formed on a 5-inch wafer, the gap between alignment marks is only 15 mm, whereas the size of the wafer is 125 mm. When one method is utilized to determine the positions of the alignment marks, the accuracy with which magnification (wafer magnification in this case) is calculated can be expected to increase approximately eight-fold because the marks of the entire wafer are measured. Chip magnification varies primarily during the process of manufacturing semiconductors. In general, manufacturing semiconductors includes a plurality of processes, in each of which wafers are subjected to various treatments, such as heating. The wafers may deform because of heat treatment and the like. When they deform, that is, expand or contract, chip magnification fluctuates. This fluctuation must be precisely calculated before alignment can be performed with accuracy, or otherwise exposure accuracy may deteriorate.